1. Field of the Invention
This invention relates to a direct current booster which generates a voltage higher than a power source voltage. More specifically, the present invention relates to, though is not particularly limited to, a direct current booster with a test circuit for supplying a higher voltage than a normal operating voltage as necessary foe altering the stored contents of a non-volatile storage device of a semiconductor integrated circuit, the stored contents of which are capable of being altered electrically. For example, such a booster would be capable of raising a normal operating voltage of DC 5 volts to a level of DC 10 to 25 volts.
2. Description of the Related Art
A conventional booster is described with reference to the circuit diagram of FIG. 1. The circuit shown includes a main booster including a plurality of booster stages connected in series in the same direction. Each of the booster stages includes one N-channel MOS semiconductor device 104 having the gate terminal and the drain terminal connected to each other so that it corresponds to a diode, and one capacitor 103 having a terminal connected to the junction between the gate and drain terminals of semiconductor device 104. The source terminal of semiconductor device 104 of each booster stage is connected to the junction between the gate and drain terminals of semiconductor device 104 of a next adjacent stage. The booster further includes a clock driver circuit 105 which generates two clock signals of opposite phase to each other from a single clock signal inputted from a booster cock input terminal 107 and supplies the thus generated clock signals in a one-by-one corresponding relationship to the terminals of other capacitors 103 so that two clock signals supplied to each adjacent capacitor 103 will be opposite in phase to each other. The booster further includes an input rectifier of an N-channel MOS semi-conductor device 102 having the gate terminal and the drain terminal connected to the input terminal 101 of the power source and having the source terminal connected to the junction of the gate and drain terminals of the first booster stage.
In operation, N-channel MOS semiconductor devices 102 and 104 pass the charge therethrough in only one direction, similarly to diodes, and the relationship in magnitude of the voltage between the drain-gate terminal and the source terminal are reversed alternately for the successive boosting stages by the clock signals of the opposite phases. Consequently, the voltage applied to input terminal 101 is successively boosted by the boosting stages so that a voltage higher than the input voltage is outputted from the output terminal 106.
It is known that time-dependent dielectric breakdown (hereinafter referred to as TDDB) occurs in oxide films obtained by oxidation of a silicon substrate by the thermal growing method. TDDB is investigated in Kikuo YAMABE et al., "Time-Dependent Dielectric Breakdown of Thin Thermally Grown SiO.sub.2 Films" in IEEE Transactions on Electron Devices, Vol. Ed. 32, No. 2, Feb. 1985, pp. 423-428. According to this document, TDDB is categorized into three modes: A, B, and C mode. The A mode can be attributed to pinholes in the gate oxide because breakdown occurs when the electric field applied to the oxide film is lower than about 2 MeV/cm. The B mode is caused by weak spots in the oxide and occurs when the applied electric field is in the range of 4 to 7 MeV/cm. The C mode is a defectfree capacitor, and the applied electric field may range higher than 9 MeV/cm. Time T to B-mode breakdown decreases logarithmically with respect to electric field strength Eox MeV/cm and is given by log(T) =-.beta. Eox, where coefficient .beta. can be represented, with respect to thickness T.sub.ox in angstroms of the oxide film, by the relation: EQU .beta.=4.2.times.log(T.sub.ox)-6.95.+-.0.65
This signifies that if electric field strength T.sub.ox is increased by 1MeV/cm when the thickness T.sub.ox of the oxide film is 400 angstroms, time T to breakdown is decreased to 10.sup.-3.3 to 10.sup.-4.6 times.
Oxide films of gates or capacitors of ordinary semiconductor integrated circuits are designed so that the electric field to be applied to the opposite electrodes may be lower than 5 MeV/cm during use of the semiconductor integrated circuits. Capacitors of a conventional booster have a maximum capacity of approximately 10 pF. They are formed from an oxide film occupying a large area on a semiconductor integrated circuit, and a high voltage is applied to the capacitors. Accordingly, as a countermeasure to prevent breakdown of the capacitors, it is a common practice to make the thickness of a gate oxide film greater than the ordinary thickness of about 100 angstroms. When a voltage of for example, 20 volts is applied between the electrodes, the electric field strength corresponds to 5 MeV/cm where the thickness of the oxide film is 400 angstroms.
Accordingly, oxide film breakdown of the B mode occurs to a certain probability with capacitors 103 of the semiconductor integrated circuit to which a high voltage of about 20 volts is applied during operation of the booster, resulting in an interruption of operation of the booster. Therefore, it is a conventional practice to cause boosters to operate for a predetermined period of time before actual use in order to perform a screening test and remove products defective due to B mode failure.
However, since the voltage applied across each capacitor during operation of the booster is higher toward the output terminal 106 of the booster and is different at different boosting stages, and since the voltage to be generated during operation by the booster is set in advance to a limited level, there is a problem that screening tests of the booster are extremely time-consuming, and sufficient test results cannot be obtained.